Commit 8dbbe0a3 authored by Rob Swindell's avatar Rob Swindell 💬
Browse files

No need to call reset_yield() if we're not calilng maybe_yield()

parent d38c2400
Pipeline #3049 passed with stage
in 9 minutes and 54 seconds
......@@ -343,7 +343,7 @@ VOID uart_wrport(WORD port, BYTE data)
,GetLastError(),retval);
} else {
assert_interrupt(UART_IER_TX_EMPTY);
reset_yield();
// reset_yield();
}
}
break;
......@@ -401,7 +401,7 @@ VOID uart_rdport(WORD port, PBYTE data)
vdd_read(data,sizeof(BYTE));
lprintf(LOG_DEBUG,"READ DATA: %s", chr(*data));
avail--;
reset_yield();
// reset_yield();
} else
*data=0;
data_waiting(avail);
......
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